CD4027BC flip-flop equivalent, dual j-k master/slave flip-flop.
Y Y Y
Y Y
Wide supply voltage range High noise immunity Low power TTL compatibility Low power Medium speed operation
3 0V to 15V 0 45 VDD (typ ) Fan out of 2 driving 7.
Ripple Binary Counters
TL F 5958
– 3
Shift Registers
TL F 5958
– 4
Truth Table
tnb.
These dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and Pchannel enhancement mode transistors Each flip-flop has independent J K set reset and clock inputs and buffered Q and Q outputs These flip-.
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